Floating Point Addition Custom VLSI Implementation

Description: During my sophomore year at Harvey Mudd College I participated in the first teaching of E158: Introduction to VLSI Design, taught by Professor David Harris.  In it we discussed many things, including optimization techniques as discussed in "Logical Effort: Designing Fast CMOS Circuits" by Ivan Edward Sutherland, Robert F. Sproull, and David Harris.  It is a wonderful book which discusses many great tricks of the trade for aiding circuit speed.  As my final project my partner and I implemented an IEEE 754 compliant fp addition unit.  It worked very well.  I was very proud of the incredible number of hours I put into it.  This report has pictures and summarizes many of the design steps taken, our estimates of layout areas and layout timing and an analysis of how well our estimates worked out.  Quick Summary:  We worked like dogs for days on end, but we did it!!! Woohoo!!!

Coming Attractions!!!
I hope to start scanning the entire manual created for the GrandSun project I was involved in as a freshmen at Harvey Mudd.  Here is the final product that is currently a nice little upstart company.  <INSERT LINK>